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First advantage:
Every voltage source can be modelled as an ideal voltage source V in series with an - ideally small - Rs, so
V = V_ideal + R_s (I'm abusing notation right now)
If you connect that source ta some load R_L you get
V_L = V.(R_L/(R_L + R_s))
if R_L -> oo then V_L = V. That means the higher the impedance of the load, the less loss you'll get at R_s and the voltage will be the same as the ideal.
Second advantage:
If no current flow through the inputs, V+ = V-, that simplifies the equations like you wouldn't believe. Same as MOSFET analysis with gate current = 0.
However, when you build a topology like the one in your pic, the current will be negligible through the input, but not through the resistors so you're anyway providing power (remember the polarizing voltage source in real ICs).
there is much more, but you can summarize as a matter of getting stuff as ideal as possible.
